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Deep dive qdTec-Day 2026: answers on cyber security, functional safety and automated board testing
The questions of the qdTec-Day, answered at length: cyber security, functional safety and automated board testing.

The qdTec-Day on 5 March 2026 was a double premiere for querdenker engineering GmbH. It was the first technology day the company had organised, and the first time the spacious event rooms in the new flow 1986 technology centre in Offenburg were used for a company event. More than 40 participants attended three technical talks and a varied supporting programme.
“There are so many issues in electronics development right now that call for change and a new direction that we wanted to offer some answers,” says managing director Florian Seibold, explaining his team's thinking. Functional safety and cyber security were obvious choices: both have been ever-present in developers' day-to-day work for some time.
On the day, the systems provider for electronics development welcomed more than 40 clients, prospective clients and business partners. With the speakers and the querdenker engineering team, the conference rooms were completely full. Some participants had travelled several hundred kilometres to attend.
After registration and a get-together, Florian Seibold welcomed the participants and introduced the programme. The two morning talks covered functional safety and the Cyber Resilience Act (CRA); in the afternoon, the architecture of the building and the querdenker engineering test fixture range were presented.
The schedule was deliberately kept open to leave enough room, alongside the talks, for discussion with the speakers and for an intensive exchange of experience among the participants, and that room was used to the full.
Impressions of the qdTec-Day on 5 March 2026
Functional safety: guidelines and principles for compliant development
The first talk was devoted to functional safety and to systems engineering in the development of electronic systems. It was split into two closely linked parts. The first, presented by Stephan Neumann (BERNS Engineers GmbH), covered the regulatory and analytical foundations. The second, given by Martin Heininger (HEICON), concentrated on putting them into practice in the development process, particularly in software development. What ties the two together is the insight that functional safety can only be achieved through the interplay of sound risk analysis (the “what”) and a strict, process-driven development culture (the “how”).
Stephan Neumann started from the principle that safety means freedom from unacceptable risk, and explained how society sets an acceptable level through laws and standards. He also gave an overview of the “jungle of standards” and explained the hierarchy of type A (basic safety), type B (group safety) and type C (product-specific safety) standards. For manufacturers, he said, the crucial first step is to identify the applicable EU directives and then to apply existing type C standards first. A central aspect is risk analysis that accompanies development and provides evidence. At the start of a development, initial safety analyses such as FMECA (failure mode, effects and criticality analysis) or CCA (common cause analysis) should be applied, followed by design FMEAs to check for design faults. Analyses that provide evidence, such as FMEDA, identify dangerous component failures and calculate figures such as MTTFd (mean time to dangerous failure) and DCavg (average diagnostic coverage). In hardware development, according to Neumann, principles apply such as keeping the number of components in safety functions to a minimum and using reliable components.
The second part of the talk, by Martin Heininger (Heicon – Global Engineering GmbH), built on these foundations and translated them into the practice of system and software development. Heininger stressed that functional safety rests on two pillars: minimising random hardware faults through architectural measures, and minimising systematic faults through strict process requirements. The basis for both is functional safety management, which requires complete evidence for every step. Heininger emphasised the enormous importance of a safety culture that is actually lived, with open communication about anomalies, objective criticism and the four-eyes principle. Without that culture, he said, functional safety cannot be implemented efficiently.
In the practical development process, the classic V-model works well, with consistent reviews at every stage. A smart documentation strategy is essential: documents should be concise (“less is more”) and keep a strict separation between the problem space (the “what”, in textual requirements) and the solution space (the “how”, in graphical architectures).
For software development, Heininger recommends separating safety-related from non-safety-related software with freedom from interference, and applying coding standards. Since most of the effort often goes into diagnostic functions and fault handling, test automation and fault injection tests at integration level are of the highest importance for safety. This brought the talk full circle to its first part: only those who follow laws and standards, are aware of the risks, develop cleanly and document every decision without gaps can implement and guarantee functional safety.
Mastering the Cyber Resilience Act: an end-to-end approach from device to cloud
After a lively discussion and a coffee break, it was time for cyber resilience, presented by a team of speakers from querdenker engineering GmbH.
The talk dealt with implementing the Cyber Resilience Act (CRA), an EU regulation that ensures cyber security for all products with digital elements. The aim of the law is to protect networks and other devices from cyber risks that can arise from direct or indirect connections.
The presentation was divided into three areas. The first covered the compliance requirements for the development team and for operations. The regulation calls for a “secure by design and default” approach, which includes secure coding guidelines, strict CI pipelines, least privilege and secure update mechanisms. Documented threat analyses, code reviews, reproducible builds and strict role and rights management are also essential. For operations, the focus is on certificate management, automatic updates, incident response processes (PSIRT) and well-planned end-of-life management.
The second part explained vulnerability analysis of embedded software. The CRA obliges manufacturers to monitor and fix security risks across the entire product life cycle. A central element is the handling of CVEs (common vulnerabilities and exposures). The process requires systematic triage, in which vulnerabilities are classified in context as “false positive”, “not affected” or “exploitable”. To keep the number of CVEs low, the recommendation is to disable optional features and to minimise the variety of libraries. The talk expressly pointed out that CVE monitoring offers no absolute guarantee of security, as it does not protect against zero-day exploits or design faults.
The third part gave a deep insight into the architecture of the qdCloud developed by querdenker engineering, an event-driven IoT platform for scalable fleet and update management. The platform supports the CRA process and offers functions such as updates at the push of a button, configurable alarms and remote access. Technically, the backbone of the cloud is NATS JetStream, which is optimised for microservices and offers high scalability and low latency. The architecture uses patterns such as event-driven architecture, command query responsibility segregation (CQRS) and scheduled controllers to create a robust, loosely coupled and scalable system landscape that reliably monitors all devices and keeps them up to date.
After so much technical input, the participants had earned a longer break. The glorious early-spring weather meant lunch could be enjoyed on the sunny roof terrace. Anyone who wanted to test their skill could also take on the “Heimspiel Profis” in the table football challenge.
The afternoon programme began with a talk and an architectural tour of the flow building. The architect Peter Waibel explained the design and construction of the five-storey building, made entirely of timber, and personally showed the participants around.
qdTest: an ICT and board test system for high-mix electronics manufacturing
Then it was back to technical matters, as another querdenker engineering team presented qdTest, the fixture family for programming and testing circuit boards. qdTest is a compact ICT (in-circuit test) and board test system designed specifically for high-mix electronics manufacturing. It is positioned as a stand-alone end-of-line solution that can be used both as a firmware flasher and for board testing. With an entry price of around EUR 3,800 net, it offers a cost-effective route to quality assurance. qdTest is available in different sizes and features a product-specific 3D-printed nest, standardised electronics and test software supplied with it, which makes it simple and intuitive to operate.
qdTest addresses a broad range of users: engineers who want to test reliably themselves, results-oriented developers who prefer a simple process, and quality-conscious QA staff who value retesting and complete traceability. The system has a modular structure. It comprises the DUT (device under test) nest, a needle alignment plate, a needle board, a structural plate and the test electronics themselves. The entire test sequence is clearly structured and easy to follow.
The process of getting information and buying the system has been kept simple, clear and transparent. With an online price calculator and online configurator, customers can adapt the system to their needs, order it and put it straight into manufacturing use on delivery. qdTest also encourages collaboration across departments, between development, manufacturing and product management. Integration into the qdCloud is planned for the future, so that device states, test results and configurations can be managed centrally and updates provided. A move to qdSOM and extended use as a HIL/SIL tester (hardware/software-in-the-loop) are also planned.
To round off the event, many guests took the opportunity to end the day over an after-work beer in a relaxed atmosphere. The consistently positive feedback has already prompted the organiser to schedule another qdTec-Day next year.
👉 Find out more: impressions of the first qdTec-Day on 5 March 2026
